Performance and power optimized computer system architectures and methods leveraging power optimized tree fabric interconnect
US9876735B2 · kind B2 · utility
60Cited by
138References
25Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 15, 2011 |
| Grant date | Jan 23, 2018 |
| Priority date | — |
| Expiry date | Jul 28, 2033 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A performance and power optimized computer system architecture and method leveraging power optimized tree fabric interconnect are disclosed. One embodiment builds low power server clusters leveraging the fabric with tiled building blocks while another embodiment implements storage solutions or cooling solutions. Yet another embodiment uses the fabric to switch non-Ethernet packets, switch multiple protocols for network processors and other devices.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.