Graphics processing system
US9881401B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 15, 2009 |
| Grant date | Jan 30, 2018 |
| Priority date | — |
| Expiry date | Mar 5, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06T11/40
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A transaction elimination hardware unit controls the writing to a frame buffer in a memory of tiles generated by a tile-based graphics processor. The transaction elimination hardware unit has a signature generator that generates a signature representative of the content of the tile for each tile. A signature comparator then compares the signature of a new tile received from the graphics processor with the signatures of one or more tiles already stored in the frame buffer to see if the signatures match. If the signatures do not match, then the signature comparator controls a write controller to write the new tile to the frame buffer. On the other hand, if the signatures match, then no data is written to the frame buffer and the existing tile is allowed to remain in the frame buffer. In this way, a tile is only written to the frame buffer if it is found by the signature comparison to differ from the tile or tiles that are already stored in the frame buffer that it is compared with.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.