Technologies for clearing a page of memory
US9881659B2 · kind B2 · utility
3Cited by
8References
23Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 25, 2015 |
| Grant date | Jan 30, 2018 |
| Priority date | — |
| Expiry date | Sep 25, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C8/12
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Technologies for clearing a page of memory include a memory device configured write a value to a block of memory cells in response to an activation signal. The memory device includes a row decoder responsive to a memory address to select a row of memory cells and a column decoder responsive to the activation signal to select one or more columns of memory cells. Additionally, a write driver of the memory device is configured to write a value to global input/output lines, which are connected to the selected memory cells in response to the activation signal and regardless of data received on a data input of the write driver.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.