Method for producing one-time-programmable memory cells and corresponding integrated circuit
US9881928B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 24, 2017 |
| Grant date | Jan 30, 2018 |
| Priority date | — |
| Expiry date | Jan 24, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/811
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An integrated circuit includes a silicon-on-insulator substrate that includes a semiconductor film located above a buried insulating layer. A first electrode of a silicide material overlies the semiconductor film. A sidewall insulating material is disposed along sidewalls of the first electrode. A dielectric layer is located between the first electrode and the semiconductor film. A second electrode includes a silicided zone of the semiconductor film, which is located alongside the sidewall insulating material and extends at least partially under the dielectric layer and the first electrode. The first electrode, the dielectric layer and the second electrode form a capacitor that is part of a circuit of the integrated circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.