TFT substrate structure and manufacturing method thereof
US9882055B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jun 8, 2017 |
| Grant date | Jan 30, 2018 |
| Priority date | — |
| Expiry date | Jun 8, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D99/00
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A manufacturing method of a TFT substrate structure is provided, in which a graphene layer is formed on a semiconductor layer and after the formation of a second metal layer, the second metal layer is used as a shielding mask to conduct injection of fluoride ions into the graphene layer to form a modified area in a portion of the graphene layer that is located on and corresponds to a channel zone of the semiconductor layer. The modified area of the graphene layer shows a property of electrical insulation and a property of blocking moisture/oxygen so as to provide protection to the channel zone. Portions of the graphene layer that are located under source and drain electrodes are not doped with ions and preserve the excellent electrical conduction property of graphene to provide electrical connection between the source and drain electrodes and the semiconductor layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.