Asymmetric full duplex communication including device power communication
US9882702B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 19, 2013 |
| Grant date | Jan 30, 2018 |
| Priority date | — |
| Expiry date | Jul 16, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L47/35
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
An active transceiver circuit for transmission of a low bitrate data signal over and reception of a high bitrate data signal from a single ended transmission medium is provided. The active transceiver circuit includes an input port for receiving a low bitrate input data signal, an output port for delivering a high bitrate output data signal, a differential input/output port for launching a low bitrate data signal into the single ended transmission medium and for receiving a high bitrate data signal from the single ended transmission medium, a first and second single ended output driver adapted for each delivering, on their respective output nodes, the shaped low bitrate input data signal, and a high bitrate receiver for receiving the signals at output nodes of the first and second single ended output drivers, and for generating a high bitrate output data signal on the output port.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.