Method and system for efficient common processing in memory device controllers

US9886196B2 · kind B2 · utility

Assignee

• Western Digital Technologies, Inc. · US

Inventors

• Sriram Rupanagunta · Brooks Road, US
• Ashish Singhai · Los Altos, US
• Sandeep Sharma · Bengaluru, IN
• Srikant Sadasivam · Bengaluru, IN
• Krishanth Skandakumaran · Los Gatos, US
• George Moussa · Sunnyvale, US
• Rajendra Prasad Mishra · Santa Clara, US
• Kenneth Alan Okin · Saratoga, US

Key dates

• Filing date: Jan 11, 2016
• Grant date: Feb 6, 2018
• Expiry date: Jan 11, 2036

Classification

• Technology area (CPC G): Physics
• CPC primary: G06F13/4282
• WIPO field: Computer technology
• WIPO sector: Electrical engineering

Abstract

Embodiments of the present invention are operable to efficiently schedule memory device commands, such as flash memory device commands, while taking into account the interdependencies of processing such commands. As such embodiments of the present invention order commands to make sure that data is written and read from memory devices in a coherent fashion using command groups. Commands within such command groups are scheduled concurrently or in parallel. In this fashion, embodiments of the present invention promote efficient execution of memory device commands while maintaining any required arbitrary ordering requirements.