Nonvolatile memory system with erase suspend circuit and method for erase suspend management
US9886214B2 · kind B2 · utility
23Cited by
114References
18Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 6, 2016 |
| Grant date | Feb 6, 2018 |
| Priority date | — |
| Expiry date | Dec 6, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2216/20
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A nonvolatile memory controller and a method for erase suspend management are disclosed. The nonvolatile memory controller includes an erase suspend circuit configured for determining a pre-suspend time each time that an erase operation of the nonvolatile memory device is suspended and for determining whether an erase-suspend limit has been reached using the determined pre-suspend time. The erase suspend circuit is further configured for preventing subsequent suspends of the erase operation when the erase-suspend limit has been reached.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.