Double processing offloading to additional and central processing units
US9886330B2 · kind B2 · utility
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20Claims
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Key dates
| Filing date | Sep 30, 2014 |
| Grant date | Feb 6, 2018 |
| Priority date | — |
| Expiry date | Sep 30, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2209/547
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A data-processing system (DTS) includes a central hardware unit (CPU) and an additional hardware unit (HW), the central hardware unit (CPU) being adapted to execute a task by a processing thread (TM), and to trigger offloading of execution of a first part (P1a, P1b, P2) of the task to the additional hardware unit (HW); and wherein the additional hardware unit is adapted to call on functionalities of the central hardware unit (CPU), triggered by the first part, and the central hardware unit (CPU) executes a second part (P2) of the task forming a sub-part of the first part by a service processing thread (TS).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.