Low latency write requests over a network using a pipelined I/O adapter device
US9886405B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 30, 2015 |
| Grant date | Feb 6, 2018 |
| Priority date | — |
| Expiry date | Feb 18, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2201/815
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Server computers may include one or more input/output (I/O) adapter devices for communicating with a network and/or direct-attached device. The I/O adapter device may implement processes to manage write requests in a general and flexible manner. The I/O adapter device may also implement processes to manage write requests in a fast an efficient—that is, low latency—manner. Low latency write requests processes may include determining that a write packet for a write request can be processed without additional assistance from a processor, once a processor has initiated a memory access request to fetch write data and also generated protocol information for transmitting the write packet. The I/O adapter device may then process and transmit the write packet through an offload pipeline, without interrupting a processor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.