Signal adjusting circuit and display panel driving circuit
US9886897B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Jul 5, 2016 |
| Grant date | Feb 6, 2018 |
| Priority date | — |
| Expiry date | Jul 5, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2320/0223
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A signal adjusting circuit and a display panel driving circuit are disclosed. The signal adjusting circuit includes an input terminal, a control terminal, an output terminal, a selection module and a delay module. The selection module is configured to selectively transfer an input signal received via the input terminal to the output terminal depending on an indication signal received via the control terminal. The delay module is configured to delay the input signal received from the selection module by an amount of time and transfer the delayed input signal to the output terminal. The display panel driving circuit includes one or more signal adjusting circuits to adjust periodic output enable pulses that enable outputting of gate scan pulses.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.