Gate driving circuit, gate driving method, and liquid crystal display
US9886921B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 15, 2012 |
| Grant date | Feb 6, 2018 |
| Priority date | — |
| Expiry date | Nov 24, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2310/08
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A gate driving circuit comprises GOA units of multiple stages. Each GOA unit includes a pull-up module and an output module. The pull-up module outputs a second clock signal to the output module when an input signal is at a high level; and the output module is turned on when the second clock signal is at a high level, and outputs a third clock signal as a first gate driving signal and outputs a fourth clock signal as a second gate driving signal when being turned on; the third clock signal and the fourth clock signal have opposite phases but the same cycle, and the cycle of the second clock signal is twice that of the third clock signal. It also discloses a liquid crystal display and a gate driving method, two rows of pixels are driven by one GOA unit, thus the space for disposing TFTs is saved, the sealing area of the LCD is reduced.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.