Method for producing structured sintered connection layers, and semiconductor element having a structured sintered connection layer

US9887173B2 · kind B2 · utility

Assignee

• Robert Bosch GmbH · DE

Inventors

• Michael Guyenot · Ludwigsburg, DE
• Michael Guenther · Nuremberg, DE
• Thomas Herboth · Ludwigsburg, DE

Key dates

• Filing date: Jun 26, 2012
• Grant date: Feb 6, 2018
• Expiry date: Feb 4, 2034

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L2924/3512
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

A method for producing a sinter layer connection between a substrate and a chip resulting in an electric and thermal connection therebetween and in reduced mechanical tensions within the chip. The method produces a sinter layer by applying a multitude of sinter elements of a base material forming the sinter layer in structured manner on a contact area of a main surface of a substrate; placing a chip to be joined to the substrate on the sinter elements; and heating and compressing the sinter elements to produce a structured sinter layer connecting the substrate and chip and extending within the contact area, the surface coverage density of the sinter elements on the substrate in a center region of the contact area being greater than the surface coverage density of the sinter elements in an edge region of the contact area, and at least one through channel, extending laterally as to the substrate's main surface being provided towards the contact area's edge. A large-area sinter element is situated in the contact area's center region, and circular sinter elements is situated in a contact area edge region. The sinter elements may also have notches. Also described is a related device.