Frequency offset correction precision of real-time clocks
US9887701B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Sep 10, 2016 |
| Grant date | Feb 6, 2018 |
| Priority date | — |
| Expiry date | Sep 10, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K23/40
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
In described examples, an apparatus includes: a counter configured to receive a reference clock signal and having a next state input and a current state output; a multiplexer coupled to the next state input of the counter, configured to output one of an incremented next state value and a corrected next state count value responsive to a count correction select control signal; a seconds reference circuit coupled to the current state output of the counter, configured to output a seconds reference signal; an incrementer coupled to the current state output of the counter, configured to output the incremented next state value; and a calibration compensation circuit coupled to a compensate up down input signal and to the current state output of the counter, configured to output the corrected next state count value and the count correction select control signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.