Amplitude and phase calibration at a receiver chip in an antenna array
US9887760B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | May 4, 2017 |
| Grant date | Feb 6, 2018 |
| Priority date | — |
| Expiry date | May 4, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04B7/0837
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
A calibration system, in a receiver chip, receives a plurality of receive signals at a plurality of receive paths. A first receive path and a second receive path is selected for a first receive signal and a second receive signal, respectively. A first signal parameter of the second receive signal is adjusted relative to the first signal parameter of the first receive signal to maximize a first signal strength value of an added signal or minimize a second signal strength value of a subtracted signal. Based on the adjusted first signal parameter, an offset of the first signal parameter is calibrated. Further, based on a matching of the second signal parameter in the second receive path relative to the second signal parameter in the first receive path, value of the second signal parameter is calibrated.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.