Simplified synchronized Ethernet implementation
US9887794B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 13, 2017 |
| Grant date | Feb 6, 2018 |
| Priority date | — |
| Expiry date | Feb 13, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L12/403
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
A method of simplifying the implementation of Synchronous Ethernet on an Ethernet device having a first port and a second port device using a predetermined protocol and signaling, comprises delivering a master clock from a Synchronous Ethernet system to the first port of the Ethernet device; transmitting the delivered master clock to the second port of the Ethernet device independently of the protocol and signaling of the Ethernet device; and transmitting the master clock from the second port of the Ethernet device to a downstream device that supports Synchronous Ethernet. In one implementation, the Ethernet device has a local clock, and the method synchronizes the local clock to the master clock. In another implementation, the Ethernet device does not have a local clock, and the master clock is transmitted from the second port of the Ethernet device to the downstream device without any synchronizing operation at the Ethernet device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.