Critical paths accommodation with frequency variable clock generator
US9891652B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 11, 2016 |
| Grant date | Feb 13, 2018 |
| Priority date | — |
| Expiry date | May 11, 2036 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Aspects of the disclosure provide an integrated circuit and method for varying a frequency of a clock signal to accommodate critical paths in the integrated circuit. The integrated circuit can include a clock generator configured to generate a clock signal having a clock frequency that is variable, circuitry that includes a plurality of critical modules that can be selectively activated to operate under control of the clock signal, each critical module including one or more critical paths that a default clock frequency cannot accommodate, and a controller that causes the clock generator to vary the clock frequency of the clock signal based on propagation delays of those critical paths in activated critical modules.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.