Heterogenous multicore processor configuration framework
US9891955B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 22, 2015 |
| Grant date | Feb 13, 2018 |
| Priority date | — |
| Expiry date | Apr 12, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F16/9024
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system and method of mapping of a processing task to a target processor is provided. Kernels associated with unit of processing defined for a processor to operate on a processing operation on the target processor required to performing the processing task. A directed acyclic graph (DAG) comprising the kernels and specifying connections between the one or more kernels represents the desired processing task to be executed by the target processor is resolved from the kernels defined in the DAG to a process executed by a processor architecture of the target processor. Data sequencing is determined from the DAG for memory usage in executing the process. Host code is generated to configure and execute the process in relation to the kernel execution for the process resolved for the processing task.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.