Systems, methods and storage media for clock tree power estimation at register transfer level
US9892227B1 · kind B1 · utility
2Cited by
2References
20Claims
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Key dates
| Filing date | Oct 29, 2015 |
| Grant date | Feb 13, 2018 |
| Priority date | — |
| Expiry date | Nov 17, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2119/06
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Systems, methods and storage media are provided for clock tree power estimation at register transfer level. For example, a physical power model is generated based at least in part on a reference post-layout design. A clock tree is modeled at register transfer level based at least in part on the physical power model. Power estimation is performed for the modeled clock tree at the register transfer level.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.