Pixel compensation circuit, method and flat display device
US9892685B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Feb 26, 2016 |
| Grant date | Feb 13, 2018 |
| Priority date | — |
| Expiry date | Jul 23, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2320/045
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
Pixel compensation circuit, method and flat display device. The circuit includes a control terminal of a first controllable switch connected with a first scanning line, first terminal connected with data line; second terminal connected with control terminal of the driving switch through a storage capacitor, a first terminal of the driving switch connected with a voltage terminal; a control terminal of the second controllable switch connected with a second scanning line, a first terminal connected with the control terminal of the driving switch, the second terminal connected with second terminal of the driving switch; control terminal of the third controllable switch connected with a third scanning line, first terminal connected with the second terminal of the driving switch; anode of an OLED connected with the second terminal of the third controllable switch, cathode is grounded to avoid unstable current of the OLED by drift of threshold voltage of driving transistor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.