Semiconductor device for mitigating through current and electronic apparatus thereof
US9892706B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 16, 2016 |
| Grant date | Feb 13, 2018 |
| Priority date | — |
| Expiry date | Apr 23, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2330/02
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor device has a first mode in which the semiconductor device is used alone and a second mode in which the semiconductor device is used in combination with another semiconductor device. Incase that one driven device is driven using the semiconductor device in the first mode and the second mode, power supply lines are caused to allow electrical conduction to each other outside of each semiconductor device in order to cancel errors of operation power supply voltages of each semiconductor device. In case that a power supply unit of each semiconductor device is operable by receiving an instruction for release of a low power consumption state, a supply start timing of the operation power supply voltages in the second mode is delayed as compared to that in the first mode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.