Digital to analog converters and memory devices and related methods
US9892782B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Mar 7, 2017 |
| Grant date | Feb 13, 2018 |
| Priority date | — |
| Expiry date | Mar 7, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2213/79
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A digital-to-analog converter (DAC) and memory device includes an array of memory cells including resistive memory elements programmable between a high resistive and low resistive state. In implementations the array of memory cells is segmented into unary and binary coded sub-arrays. The device includes a binarizer configured to couple to the memory array to assign binary weights, or segmented unary and binary weights, to currents through a plurality of memory cells or voltages across a plurality of memory cells. The memory device further includes a summer to sum the weighted outputs of the binarizer. A current to voltage converter coupled with the summer generates an analog output voltage corresponding with digital data stored in a plurality of memory cells.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.