III-nitride based N polar vertical tunnel transistor
US9893174B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 21, 2015 |
| Grant date | Feb 13, 2018 |
| Priority date | — |
| Expiry date | May 21, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/513
Abstract
A semiconductor structure, device, or N-polar III-nitride vertical field effect transistor. The structure, device, or transistor includes a current blocking layer and an aperture region. The current blocking layer and aperture region are comprised of the same material. The current blocking layer and aperture region are formed by polarization engineering and not doping or implantation. A method of making a semiconductor structure, device, or III-nitride vertical transistor. The method includes obtaining, growing, or forming a functional bilayer comprising a barrier layer and a two-dimensional electron gas-containing layer. The functional bilayer is not formed via a regrowth step.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.