Thin film transistor, array substrate, their manufacturing methods, and display device
US9893206B2 · kind B2 · utility
2Cited by
3References
20Claims
0Family size
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Key dates
| Filing date | May 4, 2016 |
| Grant date | Feb 13, 2018 |
| Priority date | — |
| Expiry date | May 4, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/6746
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present disclosure provides a TFT, an array substrate, their manufacturing methods, and a display device. A source electrode and a drain electrode of the TFT are each of a multi-layered structure including a metal layer and a metal barrier layer. An a-Si active layer of the TFT is covered with an etch stop layer, via-holes penetrating through the etch stop layer are provided at positions corresponding to the source electrode and the drain, and the source electrode and the drain electrode are connected to the a-Si active layer through the via-holes.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.