Method for testing comparator and device therefor
US9897649B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 14, 2015 |
| Grant date | Feb 20, 2018 |
| Priority date | — |
| Expiry date | Jun 8, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/3167
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
An integrated circuit facilitates a self test routine that verifies proper operation of an analog comparator. In response to entering the self test routine, the voltage provided to an input of a comparator is changed from being at an operating voltage supply to being at a self test voltage that is used to verify operation of the comparator. In response to the comparator operating properly, the self test voltage provided to the input of the comparator is replaced with the operating voltage supply, and normal operation resumes. The duration of the self test cycle is based upon the amount of time during which the self test voltage is provided to the comparator is asynchronous in nature, and therefore not a function of a clock signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.