Array substrate, method of manufacturing the same, and liquid crystal display panel
US9897865B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Jul 25, 2016 |
| Grant date | Feb 20, 2018 |
| Priority date | — |
| Expiry date | Aug 31, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG02F2201/50
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
An array substrate, a method of manufacturing the same and a liquid crystal display panel are disclosed. In the array substrate, a connection part for connecting two adjacent pixel electrodes is configured to enclose the spacer from three sides and a corresponding thin film transistor is arranged to enclose the spacer from a side other than the three sides. A distance between an upper surface of the connection part and an upper surface of the base substrate is larger than a distance between a lower surface of the spacer and the upper surface of the base substrate. With this configuration, the spacer is limited within a position limiting structure formed by the connection part and the thin film transistor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.