SoC fabric extensions for configurable memory maps through memory range screens and selectable address flattening
US9898222B2 · kind B2 · utility
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20Claims
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Key dates
| Filing date | Dec 24, 2015 |
| Grant date | Feb 20, 2018 |
| Priority date | — |
| Expiry date | Feb 18, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/1048
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Described are various SoC fabric extensions for configurable memory mapping. A memory request datapath may transmit a memory request. A first circuitry may identify any memory request having an address between a base-address and limit-address. A second circuitry may transmit to a memory interface any memory request that is identified by the first circuitry, and to apply a default memory access protocol to any memory request that is unidentified by the first circuitry. A third circuitry may modify an address of a memory request when both a multiple-memory-interface indicator and an address-flattening indicator are asserted.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.