Multi-core processor based key protection method and system
US9898624B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Jun 19, 2015 |
| Grant date | Feb 20, 2018 |
| Priority date | — |
| Expiry date | Jun 24, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L9/30
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A multi-core processor based key protection method and system is described. An Operating System (OS) supporting Symmetric Multi-Processing (SMP) is set up on a multi-core processor. One core of the multi-core processor is configured as a cryptographic operation core, which is prohibited from running other processes of the OS and dedicated to perform a public-key cryptographic operation. The private key and an intermediate variable in a process of the public-key cryptographic operation are stored in a cache exclusively occupied by the cryptographic operation core.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.