Shift register, gate driver and display device
US9898991B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Dec 13, 2013 |
| Grant date | Feb 20, 2018 |
| Priority date | — |
| Expiry date | Sep 15, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C19/28
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
Provided are a shift register, a gate driver and a display device capable of eliminating voltage coupled noise at an output terminal. The shift register comprises a pulling-up unit, a clock control unit, a resetting unit, an inverting unit and a pulling-down unit; the pulling-up unit is connected with a shift trigging signal terminal, a high level signal terminal and the resetting unit; the clock control unit is connected with the pulling-up node, a clock signal terminal and the pulling-down unit; the resetting unit is connected with a reset signal terminal, a low level signal terminal, the pulling-up node and the output terminal; the inverting unit is connected with the high and low level signal terminals, the pulling-up node and the pulling-down unit; the pulling-down unit is connected with the pulling-up node, the pulling-down node, the low level signal terminal, the shift trigging signal terminal and the output terminal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.