Robust high performance semiconductor package
US9899282B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | May 6, 2016 |
| Grant date | Feb 20, 2018 |
| Priority date | — |
| Expiry date | May 6, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2201/10424
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor package includes a suspended substrate having one or more semiconductor devices thereon, a metallic case covering the suspended substrate, the suspended substrate being supported by a plurality of mechanical leads on opposing sides of the semiconductor package, at least one of the plurality of mechanical leads having a coefficient of thermal expansion (CTE) that substantially matches a CTE of the suspended substrate, where at least one of the plurality of mechanical leads is electrically connected to the suspended substrate, and where the plurality of mechanical leads absorb mechanical shocks so as to prevent damage to the semiconductor package. The semiconductor package also includes a thermal gel between the suspended substrate and the metallic case. The suspended substrate can be a printed circuit board. The metallic case includes mounting ears for transferring heat away from the semiconductor package.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.