Semiconductor package
US9899361B2 · kind B2 · utility
7Cited by
20References
12Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 1, 2016 |
| Grant date | Feb 20, 2018 |
| Priority date | — |
| Expiry date | Sep 1, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/15311
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor package includes a logic chip mounted on a substrate, a first memory chip disposed on the logic chip, which includes a first active surface, and a second memory chip disposed on the first memory chip. The second memory chip is disposed on the first memory chip in such a way that the first memory chip and second memory chip are offset from each other. The second memory chip has a second active surface. The first active surface and the second active surface face each other and are electrically connected to each other through a first solder bump.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.