Two-dimensional material semiconductor device
US9899501B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Dec 15, 2016 |
| Grant date | Feb 20, 2018 |
| Priority date | — |
| Expiry date | Dec 15, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/111
Abstract
A semiconductor device comprises a two-dimensional (2D) material layer, the 2D material layer comprising a channel region in between a source region and a drain region; a first gate stack and a second gate stack in contact with the 2D material layer, the first and second gate stack being spaced apart over a distance; the first gate stack located on the channel region of the 2D material layer and in between the source region and the second gate stack, the first gate stack arranged to control the injection of carriers from the source region to the channel region and the second gate stack located on the channel region of the 2D material layer; the second gate stack arranged to control the conduction of the channel region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.