Split cascode circuits and related communication receiver architectures
US9899973B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 18, 2016 |
| Grant date | Feb 20, 2018 |
| Priority date | — |
| Expiry date | Apr 1, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04Q2011/0035
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Split cascade circuits include multiple cascade paths coupled between voltage supply rails. Each cascade path includes a pair of controllable switches. A feedback path is provided for at least one of the cascade circuit paths. An active load circuit may also have a split cascade structure. Multiple-stage circuits, for implementation in Trans-Impedance Amplifiers (TIAs) or analog Receive Front-End modules (RXFEs), for example, include multiple stages of split cascade circuits.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.