Memory device, memory system, and method of operating the device
US9904491B2 · kind B2 · utility
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5References
15Claims
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Key dates
| Filing date | Dec 2, 2015 |
| Grant date | Feb 27, 2018 |
| Priority date | — |
| Expiry date | Jan 21, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2029/0411
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Provided are a memory device, a memory system, and a method of operating the memory device. A method of operating a memory device including a plurality of random access memory (RAM) chips includes inputting a read command, reading a plurality of pieces of block data including first block data corresponding to the read command from each of the plurality of RAM chips, generating two-dimensional (2D) data by combining the plurality of pieces of block data read from each of the RAM chips, and processing the read command by using the 2D data.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.