Patent · US Active

Semiconductor memory devices and methods of operating the same

US9905288B2 · kind B2 · utility

8Cited by

11References

20Claims

0Family size

Assignee

SAMSUNG ELECTRONICS CO., LTD. · KR

Inventors

Seung Woo Ryu · Seoul, KR
Sang-Kyu Kang · Anyang-si, KR

Key dates

Filing date	Feb 17, 2017
Grant date	Feb 27, 2018
Priority date	—
Expiry date	Feb 17, 2037

Classification

Technology area (CPC G)Physics
CPC primaryG11C2029/0411
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

A semiconductor memory device includes a memory cell array and a control logic circuit. The control logic circuit controls access to the memory cell array based on a command and an address. The semiconductor memory device performs a write operation to write data in the memory cell array and performs a read operation to read data from the memory cell array in synchronization with a clock signal from an external memory controller. The semiconductor memory device performs the write operation and the read operation in different data strobe modes in which the semiconductor memory device uses different numbers of data strobe signals according to a frequency of the clock signal.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.