Power semiconductor device edge structure

US9905634B2 · kind B2 · utility

Assignee

• Infineon Technologies Austria AG · AT

Inventors

• Andre Schwagmann · Lehe, DE
• Elmar Falck · Hohenbrunn, DE
• Hans-Joachim Schulze · Taufkirchen, DE

Key dates

• Filing date: Jun 21, 2016
• Grant date: Feb 27, 2018
• Expiry date: Jun 21, 2036

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D30/64
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

A semiconductor device having a first load terminal, a second load terminal and a semiconductor body is presented. The semiconductor body comprises an active region configured to conduct a load current between the first load terminal and the second load terminal and a junction termination region surrounding the active region. The semiconductor body includes a drift layer arranged within both the active region and the junction termination region and having dopants of a first conductivity type at a drift layer dopant concentration of equal to or less than 1014 cm−3; a body zone arranged in the active region and having dopants of a second conductivity type complementary to the first conductivity type and isolating the drift layer from the first load terminal; a guard zone arranged in the junction termination region and having dopants of the second conductivity type and being configured to extend a depletion region formed by a transition between the drift layer and the body zone; a field stop zone arranged adjacent to the guard zone, the field stop zone having dopants of the first conductivity type at a field stop zone dopant concentration that is higher than the drift layer dopant con…