Receiver circuit
US9906064B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Sep 22, 2014 |
| Grant date | Feb 27, 2018 |
| Priority date | — |
| Expiry date | Sep 20, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04B5/79
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A receiver circuit and a device incorporating a receiver circuit are described, including a receiver circuit comprising a first rectifier arranged to receive a signal from an antenna, a second rectifier arranged to receive the signal from the antenna, and a first depletion mode NMOS transistor switch connected between the first rectifier and a first output of the receiver circuit, wherein a drain of the first transistor switch is connected to a first output of the first rectifier, a source of the first transistor switch comprises the first output of the receiver circuit, and a gate of the first transistor switch is arranged to receive a voltage based on an output of the second rectifier, such that the transistor switch is opened when a level of the signal from the antenna exceeds a predetermined level.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.