Patent · US Active

Method and system for verifying the integrity of computing devices

US9906493B1 · kind B1 · utility

12Cited by
15References
17Claims
0Family size

Assignee

Inventors

Key dates

Filing dateMay 6, 2015
Grant dateFeb 27, 2018
Priority date
Expiry dateMay 6, 2035

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH04L63/168
  • WIPO fieldDigital communication
  • WIPO sectorElectrical engineering

Abstract

A method and system for verifying integrity of computing devices. The method includes providing a first integrity associated with a server executing on a computing device to a management service, and receiving, in response to providing the first integrity measurement, a first mutual attestation value from the management service. The method further includes providing a second integrity associated with a network adaptor executing on a computing device to a management service, and receiving, in response to providing the second integrity measurement, a second mutual attestation value from the management service. The method further includes performing a mutual attestation between the server and the network adaptor using the first mutual attestation value and the second mutual attestation value, and notifying the management service that the mutual attestation has been successfully completed.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.