Display device with connection interface for common signal lines placed under planarization layer
US9910523B2 · kind B2 · utility
4Cited by
1References
18Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 28, 2015 |
| Grant date | Mar 6, 2018 |
| Priority date | — |
| Expiry date | Apr 5, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10F39/811
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A display of an electric device includes a plurality of separated transparent electrode blocks, which are configured to provide one or more of supplemental features such as touch recognition. Signal paths between the transparent electrode blocks and the driver for the supplemental features are implemented with a plurality of conductive lines positioned under one or more planarization layers. The conductive lines implementing the signal paths are routed across the display area, directly toward a non-display area where drive-integrated circuits are located.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.