Reflective memory bridge for external computing nodes
US9910808B2 · kind B2 · utility
1Cited by
15References
15Claims
0Family size
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Key dates
| Filing date | Apr 30, 2012 |
| Grant date | Mar 6, 2018 |
| Priority date | — |
| Expiry date | Aug 7, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/0284
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In at least some examples, a computing node includes a processor and a local memory coupled to the processor. The computing node also includes a reflective memory bridge coupled to the processor. The reflective memory bridge maps to an incoming region of the local memory assigned to at least one external computing node and maps to an outgoing region of the local memory assigned to at least one external computing node.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.