Multiphase I/O for processor-based emulation system
US9910810B1 · kind B1 · utility
3Cited by
13References
18Claims
0Family size
Assignee
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Key dates
| Filing date | Oct 23, 2015 |
| Grant date | Mar 6, 2018 |
| Priority date | — |
| Expiry date | May 16, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/4282
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Systems and methods of emulating application-specific integrated circuits using multiple execution phases, where different inputs and outputs are used or produced by components of the emulation system are disclosed. For example, an OMUX may select and transmit different data over a serial bus based on the execution phase of the emulator system. In another example, a processor or cluster may capture outputted data during a first execution phase, execute instructions for a second execution phase, and then return to the capture outputted data for further processing during a next cycle of the first execution phase.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.