Serdes interface architecture for multi-processor systems
US9910818B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 2, 2013 |
| Grant date | Mar 6, 2018 |
| Priority date | — |
| Expiry date | May 12, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/4295
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A local device, such as a field-programmable gate array, has a local state machine and a local interface component for communicating with a remote device that implements a remote state machine. The local interface component receives a new set of incoming data from the remote device and determines whether the new set is good data or bad data. If good data, then the local interface component causes the new set of data to transmitted internally for use by the local state machine. If bad data, then the local interface component does not forward the new set of data to the local state machine, which instead continues to use a previously received set of good data. Although the clock rate of the local and remote state machines may differ from the frame rate of the local interface component, their operations are nevertheless synchronized.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.