Semiconductor device having impurity region
US9911809B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 3, 2017 |
| Grant date | Mar 6, 2018 |
| Priority date | — |
| Expiry date | Feb 3, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/6213
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device having an impurity region is provided. The semiconductor device includes a fin active region having protruding regions and a recessed region between the protruding regions. Gate structures overlapping the protruding regions are disposed. An epitaxial layer is disposed in the recessed region to have a height greater than a width. An impurity region is disposed in the fin active region, surrounds side walls and a bottom of the recessed region, has the same conductivity type as a conductivity type of the epitaxial layer, and includes a majority impurity that is different from a majority impurity included in at least a portion of the epitaxial layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.