Thin film transistor with low trap-density material abutting a metal oxide active layer and the gate dielectric

US9911857B2 · kind B2 · utility

Assignee

• CBRITE INC. · US

Inventors

• Chan-Long Shieh · Paradise Valley, US
• Fatt Foong · Goleta, US
• Gang Yu · Lompoc, US

Key dates

• Filing date: Oct 29, 2010
• Grant date: Mar 6, 2018
• Expiry date: Oct 26, 2032

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D30/6757

Abstract

A metal oxide semiconductor device including an active layer of metal oxide, a layer of gate dielectric, and a layer of low trap density material. The layer of low trap density material is sandwiched between the active layer of metal oxide and the layer of gate dielectric. The layer of low trap density material has a major surface parallel and in contact with a major surface of the active layer of metal oxide to form a low trap density interface with the active layer of metal oxide. A second layer of low trap density material can optionally be placed in contact with the opposed major surface of the active layer of metal oxide so that a low trap density interface is formed with both surfaces of the active layer of metal oxide.