Systems and methods for controlling multi-level diode-clamped inverters using space vector pulse width modulation (SVPWM)
US9912251B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Apr 21, 2017 |
| Grant date | Mar 6, 2018 |
| Priority date | — |
| Expiry date | Apr 21, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH02M7/53876
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
Control systems for a multi-level diode-clamped inverter and corresponding methods include a processor and a digital logic circuit forming a hybrid controller. The processor identifies sector and region locations based on a sampled reference voltage vector V* and angle θe*. The processor then selects predefined switching sequences and pre-calculated turn-on time values based on the identified sector and region locations. The digital logic circuit generates PWM switching signals for driving power transistors of a multi-level diode-clamped inverter based on the turn-on time values and the selected switching sequences. The control system takes care of the existing capacitor voltage balancing issues of multi-level diode-clamped inverters while supplying both active and reactive power to an IT load. Using the control system, one can generate a symmetrical PWM signal that fully covers the linear under-modulation region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.