Digital-based power reduction technique for SAR ADCs
US9912346B1 · kind B1 · utility
2Cited by
3References
10Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Apr 13, 2017 |
| Grant date | Mar 6, 2018 |
| Priority date | — |
| Expiry date | Apr 13, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/182
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A method for pre-loading a SAR ADC with an initial value for a selected range of high-order bits. If the ADC resolves at either an upper or a lower limit set by the pre-loaded value, the ADC may discard the pre-loaded value and perform a full search. Alternatively, the ADC may perform one or more “bonus steps” before giving up and performing a full search.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.