System-on-chip including on-chip clock controller and mobile device having the same
US9915933B2 · kind B2 · utility
7Cited by
13References
20Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Dec 15, 2015 |
| Grant date | Mar 13, 2018 |
| Priority date | — |
| Expiry date | Dec 15, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K3/356008
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A system-on-chip (SoC) includes a logic circuit having a scan flip-flop and a an on-chip clock controller. The scan flip-flop is configured to store data using a passive keeper. The on-chip clock controller is configured to receive a reference clock for driving the logic circuit, to generate an internal clock based on a high-state interval of the reference clock, and to provide the internal clock to the scan flip-flop.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.