Coherent timer management in a multicore or multithreaded system
US9915969B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 13, 2015 |
| Grant date | Mar 13, 2018 |
| Priority date | — |
| Expiry date | Sep 22, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/4825
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In a processing system, a method includes transmitting a timer expiration notification from a timer management component of a processor to one or more other components of the processor in response to expiration of a timer. The method further includes transmitting, from a component of the processor that requested instantiation of the timer, a timer release confirmation message to the timer management component in response to the timer expiration notification, the timer release confirmation message confirming that the component has released the timer. The method also includes preventing reallocation of a timer identifier (ID) associated with the timer to another timer after the expiration of the timer and until receipt of the timer release confirmation message at the timer management component.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.