Doherty amplifiers with minimum phase output networks
US9917551B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | May 24, 2017 |
| Grant date | Mar 13, 2018 |
| Priority date | — |
| Expiry date | May 24, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2200/541
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A Doherty amplifier includes an output combining network that has a first combining network input coupled to a main amplifier path, a lowest-order combining network input coupled to a lowest-order peaking amplifier path, and N−2 additional combining network inputs coupled to other peaking amplifier paths. A final summing node is coupled to the combining network output, and is directly coupled to the first combining network input. N−2 intermediate summing nodes are coupled to the N−2 additional combining network inputs. An offset line is coupled between the lowest-order combining network input and a lowest-order summing node. A longest phase delay imparted by the output combining network on a peaking RF signal between the lowest-order combining network input and the final summing node is greater than all other phase delays imparted on any other RF signal provided to the first combining network input and the N−2 additional combining network inputs.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.