Logarithmic analog to digital converter devices and methods thereof
US9917593B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Dec 16, 2016 |
| Grant date | Mar 13, 2018 |
| Priority date | — |
| Expiry date | Dec 16, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M3/476
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An analog to digital converter includes an error integration circuit configured to receive an input charge from a detector and to integrate a difference between the input charge and one or more feedback charge pulses to create an error voltage. A quantizer is in operable communication with the error integration circuit and is responsive to the created error voltage. An accumulator having a mantissa component and a radix component is in operable communication with the quantizer. A charge feedback device in operable communication with the quantizer and the radix component of the accumulator. The charge feedback device is configured to generate the one or more feedback charge pulses proportional to the radix component of the accumulator and an output of the quantizer. Digital focal plane read out integrated circuits including the analog to digital converter are also disclosed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.